The present invention relates generally to electronic circuits and electronic circuit design, and, more particularly to a system for reducing leakage power of an electronic circuit.
Electronic circuits are designed using multiple building blocks known as cells. A cell is a digital logic element that performs a specific function. Examples of cells include various logic gates, such as AND, OR, XOR, NOT, and counterparts like NAND, NOR and XNOR. Each cell in a circuit must meet timing constraints, i.e., the cell must provide an output before a predefined time period elapses. A cell is said to have timing slack when a delay in its output does not affect an overall delay of the electronic circuit. For example, if a cell requires a minimum of 5 nanoseconds to generate an output and the electronic circuit requires the signal from the cell to be output within 10 nanoseconds, then the cell is said to have a timing slack of 5 nanoseconds.
The total power consumption of an electronic circuit is a sum of the dynamic power and leakage power of each cell of the circuit. The dynamic power is the power consumed by the cell while performing its desired function and the leakage power is the power consumed by the cell due to unintended leakage of power from the cell. The leakage power depends on a threshold voltage of the cell, where the higher the threshold voltage, the lower the leakage power. However, higher threshold voltage degrades the speed of the cell, which reduces or consumes the timing slack (if any) of the cell.
One technique to reduce leakage power is to identify cells having timing slack and replace them with corresponding cells having a higher threshold voltage. Although this technique reduces the leakage power of the circuit without compromising speed, it fails when the cells do not have timing slack.
Therefore, it would be advantageous to be able to reduce leakage power as well as overall power consumption but does not does not degrade the operational speed of the circuit, and that overcomes the above-mentioned limitations of existing systems for reducing leakage power of electronic circuits.